chisel

<a href="https://www.chisel-lang.org">
  <img src="https://raw.githubusercontent.com/chipsalliance/chisel/main/docs/src/images/chisel_logo.svg?sanitize=true" height="60">
</a>
<a href="https://www.chipsalliance.org">
  <img align="right" src="https://raw.githubusercontent.com/chipsalliance/.github/main/profile/images/chips_alliance.svg?sanitize=true" height="60">
</a>

The **Constructing Hardware in a Scala Embedded Language** ([**Chisel**](https://www.chisel-lang.org)) is an open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates **advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs**.

Chisel adds hardware construction primitives to the [Scala](https://www.scala-lang.org) programming language, providing designers with the power of a modern programming language to write complex, parameterizable circuit generators that produce synthesizable Verilog.
This generator methodology enables the creation of re-usable components and libraries, such as the FIFO queue and arbiters in the [Chisel Standard Library](https://www.chisel-lang.org/api/latest/#chisel3.util.package), raising the level of abstraction in design while retaining fine-grained control.

For more information on the benefits of Chisel see: ["What benefits does Chisel offer over classic Hardware Description Languages?"](https://stackoverflow.com/questions/53007782/what-benefits-does-chisel-offer-over-classic-hardware-description-languages)

Chisel is powered by [FIRRTL (Flexible Intermediate Representation for RTL)](https://github.com/chipsalliance/firrtl-spec),
a hardware compiler framework implemented by [LLVM CIRCT](https://github.com/llvm/circt).

Chisel is [permissively licensed](LICENSE) (Apache 2.0) under the guidance of [CHIPS Alliance](https://www.chipsalliance.org).

- [What does Chisel code look like?](#what-does-chisel-code-look-like)
  - [LED blink](#led-blink)
  - [FIR Filter](#fir-filter)
- [Getting Started](#getting-started)
  - [Bootcamp Interactive Tutorial](#bootcamp-interactive-tutorial)
  - [A Textbook on Chisel](#a-textbook-on-chisel)
  - [Build Your Own Chisel Projects](#build-your-own-chisel-projects)
  - [Guide For New Contributors](#guide-for-new-contributors)
  - [Design Verification](#design-verification)
- [Documentation](#documentation)
  - [Useful Resources](#useful-resources)
  - [Chisel Dev Meeting](#chisel-dev-meeting)
  - [Data Types Overview](#data-types-overview)
- [Contributor Documentation](#contributor-documentation)
  - [Useful Resources for Contributors](#useful-resources-for-contributors)
  - [Compiling and Testing Chisel](#compiling-and-testing-chisel)
  - [Running Projects Against Local Chisel](#running-projects-against-local-chisel)
  - [Chisel Architecture Overview](#chisel-architecture-overview)
  - [Chisel Sub-Projects](#chisel-sub-projects)
  - [Which version should I use?](#which-version-should-i-use)
  - [Roadmap](